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? semiconductor components industries, llc, 2003 april, 2003 - rev. 1 1 publication order number: eclLQFP32evb/d eclLQFP32evb evaluation board manual for high frequency LQFP32 introduction on semiconductor has developed an evaluation board for the devices in 32-lead lqfp package. these evaluation boards are offered as a convenience for the customers interested in performing their own engineering assessment on the general performance of the 32-lead lqfp device samples. the board provides a high bandwidth 50 controlled impedance environment. figures 1 and 2 show the top and bottom view of the evaluation board, which can be configured in several different ways, depending on device under test (see table 1. configuration list). this evaluation board manual contains: ? information on 32-lead lqfp evaluation board ? assembly instructions ? appropriate lab setup ? bill of materials this manual should be used in conjunction with the device data sheet, which contains full technical details on the device specifications and operation. board lay-up the 32-lead lqfp evaluation board is implemented in four layers with split (dual) power supplies (see figure 3. evaluation board lay-up). for standard ecl lab setup and test, a split (dual) power supply is essential to enable the 50 internal impedance in the oscilloscope as a termination for ecl devices. the first layer or primary trace layer is 0.008 thick rogers ro4003 material, which is designed to have equal electrical length on all signal traces from the device under the test (dut) to the sense output. the second layer is the 1.0 oz copper ground. the fr4 dielectric material is placed between second and third layer and between third and fourth layer. the third layer is the power plane (v cc & v ee ) and a portion of this layer is a ground plane. the fourth layer is the secondary trace layer. figure 1. top view of the 32-lead lqfp evaluation board evaluation board manual http://onsemi.com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 2 figure 2. bottom view of the 32-lead lqfp evaluation board bottom view enlarged bottom view figure 3. evaluation board lay-up lay-up detail 4 layer layer 1 (top side) 1 oz rogers 4003 0.008 in layer 2 (ground plane p1) 1 oz fr-4 0.020 in layer 3 (ground, vcc & vee, plane p2) 1 oz fr-4 0.025 in layer 4 (bottom side) 1 oz silkscreen (top side) 0.062 0.007 board layout the 32-lead lqfp evaluation board was designed to be versatile and accommodate several different configurations. the input, output, and power pin layout of the evaluation board is shown in figures 4 and 5. the evaluation board has at least thirteen possible configurable options. table 1, list the devices and the relevant configuration that utilizes this pcb board. lists of components and simple schematics are located in figures 6 through 18. place sma connectors on j1 through j32, 50 chip resistors between ground pad and pin 1 pad through pin 32 pad, and chip capacitors c1 through c5 according to configuration figures. (c4 and c5 are 0.01 f and c1, c2, and c3 are 0.1 f); (see figure 5). .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 3 figure 4. evaluation board layout top view bottom view .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 4 pin 1 pin 2 pin 3 pin 4 pin 5 pin 6 pin 7 pin 8 pin 24 pin 23 pin 22 pin 21 pin 20 pin 19 pin 18 pin 17 figure 5. enlarged bottom view of the evaluation board ground v ee v cc c5 c4 pin 16 pin 15 pin 14 pin 13 pin 12 pin 11 pin 10 pin 9 pin 25 pin 26 pin 27 pin 28 pin 29 pin 30 pin 31 pin 32 table 1. configuration list configuration comments device 1 see figure 6 lve164 2 see figure 7 ep016 / ep016a 3 see figure 8 ep101 / ep105 4 see figure 9 ep116 5 see figure 10 ep131 6 see figure 11 ep142 7 see figure 12 ep195 / ep196 8 see figure 13 ep445 9 see figure 14 ep446 10 see figure 15 ep451 11 see figure 16 ep809 12 see figure 17 lvep111 / lvep210 13 see figure 18 lvep210s .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 5 evaluation board assembly instructions the 32-lead lqfp evaluation board is designed for characterizing devices in a 50 laboratory environment using high bandwidth equipment. each signal trace on the board has a via, which has an option of placing a termination resistor depending on the input/output configuration (see table 1, configuration list). table 17 contains the bill of materials for this evaluation board. solder the device on the evaluation board the soldering can be accomplished by hand soldering or soldering re-flow techniques. make sure pin 1 of the device is located next to the white dotted mark and all the pins are aligned to the footprint pads. solder the 32-lead lqfp device to the evaluation board. connecting power and ground planes for standard ecl lab setup and test, a split (dual) power supply is required enabling the 50 internal impedance in the oscilloscope to be used as a termination of the ecl signals (v tt = v cc 2.0 v, in split power supply setup, v tt is the system ground, v cc is 2.0 v, and v ee is 3.0 v or 1.3 v; see table 2, power supply levels). table 2. power supply levels power supply v cc v ee gnd 5.0 v 2.0 v -3.0 v 0.0 v 3.3 v 2.0 v -1.3 v 0.0 v 2.5 v 2.0 v -0.5 v 0.0 v connect three banana jack sockets to v cc , v ee , and gnd labeled holes. wire bond the appropriate device pin pad on the bottom side of the board to v cc and v ee power stripes. (device specific, please see configuration for each desired device. see figure 5) it is recommended to solder 0.01 f capacitors to c4 and c5 to reduce the unwanted noise from the power supplies. c1, c2, and c3 pads are provided for 0.1 f capacitor to further diminish the noise from the power supplies. adding capacitors can improve edge rates, reduce overshoot and undershoot. termination all ecl outputs need to be terminated to v tt (v tt = v cc 2.0 v = gnd) via a 50 resistor. 0402 chip resistor pads are provided on the bottom side of the evaluation board to terminate the ecl driver (more information on termination is provided in an8020). solder the chip resistors to the bottom side of the board between the appropriate input of the device pin pads and the ground pads. for ease of assembly, it is advised to place and solder termination resistors on its vertical (side) position, instead of its original or flat position. installing the sma connectors each configuration indicates the number of sma connectors needed to populate an evaluation board for a given configuration. each input and output requires one sma connector. attach all the required sma connectors onto the board and solder the connectors to the board on j1 through j32. please note that alignment of the signal connector pin of the sma can influence the lab results. the reflection and launch of the signals are largely influenced by imperfect alignment and soldering of the sma connector. validating the assembled board after assembling the evaluation board, it is recommended to perform continuity checks on all soldered areas before commencing with the evaluation process. time domain reflectometry (tdr) is another highly recommended validation test. .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 6 configurations j2 j3 j4 j5 j6 j10 j11 j12 j31 j30 j29 j28 j27 j26 j13 j15 j19 j20 j21 j22 j23 figure 6. configuration 1 0402 chip resistor 50 pin 1 wire normal top view lve164 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view lve164 32 power resistor connector pin # device j32 j31 j30 j29 n n n j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 y y n 27 y y n 26 y y n 25 n n n 24 n n n 23 y y n 22 y y n 21 j21 j20 j19 j18 y y n j17 j16 j15 j14 j13 j12 j11 20 y y n 19 y y n 18 n n y 17 n n n 16 n n n 15 y y n 14 n n y 13 y n n 12 y n n 11 y y n 10 j10 j9 j8 j7 y y n j6 j5 j4 j3 j2 j1 9 y y n 8 n n n 7 n n y 6 y y n 5 y y n 4 y y n 3 y y n 2 y y n 1 n n n table 3. configuration 1 (device lve164) j9 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 7 j2 j3 j4 j5 j6 j7 j10 j11 j12 j31 j30 j29 j27 j26 j14 j15 j16 j17 j18 j19 j20 j21 j22 j23 j24 j25 figure 7. configuration 2 0402 chip resistor 50 pin 1 wire normal top view ep016 / ep016a 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep016 / ep016a 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y n n 30 y n n 29 y n n 28 n n y 27 y y n 26 y y n 25 y y n 24 y n n 23 y y n 22 y y n 21 j21 j20 j19 j18 y y n j17 j16 j15 j14 j13 j12 j11 20 y y n 19 y y n 18 y y n 17 y y n 16 y y n 15 y y n 14 y y n 13 n n y 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 n n y 8 n n y 7 y y n 6 y n n 5 y n n 4 y n n 3 y n n 2 y n n 1 n n y table 4. configuration 2 (device ep016 and ep016a) .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 8 j2 j3 j4 j5 j6 j7 j11 j12 j30 j29 j27 j26 j14 j15 j16 j17 j18 j19 j20 j21 j22 j23 j24 j25 figure 8. configuration 3 0402 chip resistor 50 pin 1 wire normal top view ep101 / ep105 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep101 / ep105 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 n n y 30 y n n 29 y n n 28 n n y 27 y y n 26 y y n 25 y y n 24 y y n 23 y y n 22 y y n 21 j21 j20 j19 j18 y y n j17 j16 j15 j14 j13 j12 j11 20 y y n 19 y y n 18 y y n 17 y y n 16 y y n 15 y y n 14 y y n 13 n n y 12 y y n 11 y y n 10 j10 j9 j8 j7 n n y j6 j5 j4 j3 j2 j1 9 n n n 8 n n y 7 y n n 6 y n n 5 y n n 4 y n n 3 y n n 2 y n n 1 n n y table 5. configuration 3 (device ep101 and ep105) .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 9 j2 j3 j4 j5 j6 j7 j10 j11 j31 j30 j29 j27 j26 j14 j15 j18 j19 j20 j21 j22 j23 j24 j25 figure 9. configuration 4 0402 chip resistor 50 pin 1 wire normal top view ep116 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep116 32 power resistor connector pin # device j32 j31 j30 j29 y y n j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 n n y 27 y y n 26 y y n 25 y y n 24 y y n 23 y y n 22 y y n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 n n y 16 n n y 15 y n n 14 y n n 13 n n y 12 n n y 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 n n y 8 n n y 7 y n n 6 y n n 5 y n n 4 y n n 3 y n n 2 y y n 1 y y n table 6. configuration 4 (device ep116) j1 j32 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 10 j2 j3 j4 j5 j6 j7 j10 j11 j12 j31 j30 j29 j27 j26 j14 j15 j17 j18 j19 j20 j21 j22 j23 j24 figure 10. configuration 5 0402 chip resistor 50 pin 1 wire normal top view ep131 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep131 32 power resistor connector pin # device j32 j31 j30 j29 y y n j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 n n y 27 y y n 26 y y n 25 n n y 24 y n n 23 y n n 22 y n n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 y n n 16 n n y 15 y y n 14 y y n 13 n n y 12 y y n 11 y y n 10 j10 j9 j8 j7 y y n j6 j5 j4 j3 j2 j1 9 n n y 8 y y n 7 y y n 6 y y n 5 y y n 4 y y n 3 y y n 2 y y n 1 y y n table 7. configuration 5 (device ep131) j32 j1 j8 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 11 j2 j3 j4 j5 j6 j7 j10 j11 j12 j31 j30 j29 j27 j26 j14 j15 j18 j19 j20 j21 j22 j23 j24 j25 figure 11. configuration 6 0402 chip resistor 50 pin 1 wire normal top view ep142 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep142 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 n n y 27 y y n 26 y y n 25 y y n 24 y y n 23 y y n 22 y n n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 n n y 16 n n y 15 n n y 14 n n y 13 n n y 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 y y n 8 y y n 7 y y n 6 y y n 5 y y n 4 y y n 3 y y n 2 y y n 1 y y n table 8. configuration 6 (device ep142) j8 j9 j1 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 12 j2 j3 j4 j5 j7 j10 j11 j12 j31 j30 j29 j27 j26 j14 j15 j16 j17 j20 j21 j23 j25 figure 12. configuration 7 0402 chip resistor 50 pin 1 wire normal top view ep195 / ep196 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep195 / ep196 32 power resistor connector pin # device j32 j31 j30 j29 y y n j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 n n y 27 y y n 26 y y n 25 y y n 24 n n y 23 y y n 22 n n y 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 n n y 18 n n y 17 * n n 16 y y n 15 y y n 14 n n y 13 y y n 12 y y n 11 y y n 10 j10 j9 j8 j7 y y n j6 j5 j4 j3 j2 j1 9 n n y 8 y n n 7 y n n 6 y n n 5 y y n 4 y y n 3 y y n 2 y y n 1 y y n table 9. configuration 7 (device ep195 and ep196) j32 j1 j8 only for ep196 * only for ep196 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 13 j2 j3 j4 j5 j6 j7 j10 j11 j31 j30 j29 j27 j26 j14 j15 j18 j19 j21 j22 j23 j25 figure 13. configuration 8 0402 chip resistor 50 pin 1 wire normal top view ep445 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep445 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y n n 28 n n y 27 y y n 26 y y n 25 y y n 24 n n y 23 y y n 22 y y n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 n n y 19 y n n 18 y n n 17 n n y 16 n n y 15 y n n 14 y n n 13 n n y 12 n n y 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 y n n 8 y n n 7 y y n 6 y n n 5 y y n 4 y y n 3 y y n 2 y y n 1 y y n table 10. configuration 8 (device ep445) j9 j1 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 14 j2 j3 j4 j5 j6 j7 j11 j12 j31 j30 j29 j27 j26 j14 j15 j17 j18 j19 j20 j21 j22 j23 j24 figure 14. configuration 9 0402 chip resistor 50 pin 1 wire normal top view ep446 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep446 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y n n 30 y y n 29 y y n 28 n n y 27 y n n 26 y n n 25 n n y 24 y y n 23 y y n 22 y y n 21 j21 j20 j19 j18 y y n j17 j16 j15 j14 j13 j12 j11 20 y y n 19 y y n 18 y y n 17 y y n 16 n n y 15 y n n 14 y n n 13 n n y 12 y n n 11 y n n 10 j10 j9 j8 j7 n n y j6 j5 j4 j3 j2 j1 9 n n y 8 n n y 7 y y n 6 y y n 5 y n n 4 y y n 3 y y n 2 y y n 1 n n y table 11. configuration 9 (device ep446) .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 15 j2 j3 j4 j5 j8 j7 j10 j11 j12 j31 j30 j29 j27 j26 j14 j15 j17 j18 j20 j21 j22 j23 j24 j25 figure 15. configuration 10 0402 chip resistor 50 pin 1 wire normal top view ep451 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view ep451 32 power resistor connector pin # device j32 j31 j30 j29 y y n j28 j27 j26 j25 j24 j23 j22 31 y y n 30 y y n 29 y y n 28 n n y 27 y y n 26 y y n 25 y y n 24 y y n 23 y y n 22 y y n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 n n y 18 y n n 17 y n n 16 n n y 15 y n n 14 y n n 13 n n y 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 y n n 8 y n n 7 y n n 6 n n y 5 y y n 4 y y n 3 y y n 2 y y n 1 y y n table 12. configuration 10 (device ep451) j9 j1 j32 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 16 j2 j3 j4 j5 j6 j8 j10 j11 j12 j31 j30 j29 j28 j27 j26 j14 j15 j18 j19 j20 j21 j22 j23 figure 16. configuration 11 0402 chip resistor 50 pin 1 wire normal top view ep809 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee = v cco v cc expanded bottom view ep809 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y n n 30 y n n 29 y n n 28 y n n 27 y n n 26 y n n 25 n n y 24 n n y 23 y n n 22 y n n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 n n y 16 n n y 15 y n n 14 y n n 13 y n n 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 n n y 8 y y n 7 n n y 6 y y n 5 y y n 4 y y n 3 y y n 2 y y n 1 n n y table 13. configuration 11 (device ep809) j13 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 17 j2 j3 j4 j6 j7 j10 j11 j12 j31 j30 j29 j28 j27 j26 j14 j15 j17 j18 j19 j20 j21 j22 j23 j24 figure 17. configuration 12 0402 chip resistor 50 pin 1 wire normal top view lvep111 / lvep210 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view lvep111 / lvep210 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y n n 30 y n n 29 y n n 28 y n n 27 y n n 26 y n n 25 n n y 24 y n n 23 y n n 22 y n n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 y n n 16 n n y 15 y n n 14 y n n 13 y n n 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 n n y 8 n n y 7 y y n 6 y y n 5 y n n 4 y y n 3 y y n 2 y y n 1 n n y table 14. configuration 12 (device lvep111 and lvep210) j13 * pin 2 is no connect for lvep210 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 18 j2 j3 j4 j6 j7 j10 j11 j12 j31 j30 j29 j28 j27 j26 j14 j15 j17 j18 j19 j20 j21 j22 j23 j24 figure 18. configuration 13 0402 chip resistor 50 pin 1 wire normal top view lvep210s 0805 chip capacitor 0.01 f sma connectors banana jack plug 0603 chip capacitor 0.1 f v ee v cc expanded bottom view lvep210s 32 power resistor connector pin # device j32 j31 j30 j29 n n y j28 j27 j26 j25 j24 j23 j22 31 y n n 30 y n n 29 y n n 28 y n n 27 y n n 26 y n n 25 n n y 24 y n n 23 y n n 22 y n n 21 j21 j20 j19 j18 y n n j17 j16 j15 j14 j13 j12 j11 20 y n n 19 y n n 18 y n n 17 y n n 16 n n y 15 y n n 14 y n n 13 y n n 12 y n n 11 y n n 10 j10 j9 j8 j7 y n n j6 j5 j4 j3 j2 j1 9 n n y 8 n n y 7 y y n 6 y y n 5 y y n 4 y y n 3 y y n 2 y y n 1 n n y table 15. configuration 13 (device lvep210s) j13 .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 19 lab setup figure 19. example of standard lab setup (configuration 12) d u t differential signal generator test measuring equipment channel 1 channel 2 channel 3 channel 4 channel 5 channel 6 channel 7 channel 8 trigger trigger out1 out1 j4 j3 j31 j30 j29 j28 j27 j26 j24 j23 v cc gnd v ee power supply 1. connect appropriate power supplies to v cc , v ee , and gnd. for standard ecl lab setup and test, a split (dual) power supply is required enabling the 50 internal impedance in the oscilloscope to be used as a termination of the ecl signals (v tt = v cc 2.0 v, in split power supply setup, v tt is the system ground, v cc is 2.0 v, and v ee is 3.0 v or 1.3 v; see table 16). 2. connect a signal generator to the input sma connectors. setup input signal according to the device data sheet. 3. connect a test measurement device on the device output sma connectors. note: the test measurement device must contain 50 termination. table 16. power supply levels power supply v cc v ee gnd 5.0 v 2.0 v -3.0 v 0.0 v 3.3 v 2.0 v -1.3 v 0.0 v 2.5 v 2.0 v -0.5 v 0.0 v table 17. bill of materials components manufacturer description part number web site sma connector johnson components* sma connector, side launch, gold plated 142-0701-851 http://www.johnsoncomponents.com banana jack keystone* standard jack 6096 http://www.keyelco.com miniature jack 6090 chip capacitor johanson dielectric * 0603 0.01 f 500r14z100mv4e http://www.johansondielectrics.com dielectric* 0603 0.1 f 250r14z101mv4e chip resistor panasonic* 0402 50 1% precision think film chip resistor erj-2rkf49r9x http://www.panasonic.com evaluation board on semiconductor LQFP32 evaluation board eclLQFP32evb http://www.onsemi.com device samples on semiconductor LQFP32 package device various http://www.onsemi.com *components are available through most distributors, i.e. www.newark.com, www.digikey.com. .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 20 figure 20. gerber files top view second layer (ground plane) .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 21 figure 21. gerber files third layer (power and ground plane) (left side - v cc , right side - v ee , middle box - ground) bottom layer .com .com .com .com .com 4 .com u datasheet
eclLQFP32evb http://onsemi.com 22 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. eclLQFP32evb/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada .com .com .com .com 4 .com u datasheet

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